LISTING FOR LOGIC DESCRIPTION FILE: xu9r4s4.pld                      Page 1

CUPL: Universal Compiler for Programmable Logic
Version 3.2a Serial# MD-32A-6848
Copyright (C)  1983,1989 Logical Devices, Inc.
Created Tue Sep 08 14:02:39 1992

  1:
  2:Name            XU9R4S4;
  3:Partno          xxx;
  4:Date            09/08/92;
  5:Revision        04;
  6:Designer        Christopher Coley;
  7:Company         Commodore;
  8:Assembly        xxxx;
  9:Location        xxxx;
 10:
 11:Device          P16R4;
 12:
 13:/******************************************************************/
 14:/*                                                                */
 15:/*                                                                */
 16:/*                                                                */
 17:/******************************************************************/
 18:/*  Allowable Target Device PAL 16R4-10                           */
 19:/******************************************************************/
 20:
 21:/**     Inputs   **/
 22:
 23:Pin     1       =       CPUCLK  ;       /*                        */
 24:Pin     2       =       AS_     ;       /*                        */
 25:Pin     3       =       ROMEN_  ;       /*                        */
 26:Pin     4       =       FC1     ;       /*                        */
 27:Pin     5       =       FC0     ;       /*                        */
 28:Pin     6       =       A17     ;       /*                        */
 29:Pin     7       =       A16     ;       /*                        */
 30:Pin     8       =       DSACK1_ ;       /*                        */
 31:Pin     9       =       OPTION  ;       /*                        */
 32:Pin     11      =       OE_     ;       /*                        */
 33:
 34:/**     Outputs  **/
 35:
 36:Pin     12      =       DSACK0_ ;       /*                        */
 37:Pin     13      =       AVEC_   ;       /*                        */
 38:Pin     14      =       Q0      ;       /*                        */
 39:Pin     15      =       Q1      ;       /*                        */
 40:Pin     16      =       Q2      ;       /*                        */
 41:Pin     17      =       Q3      ;       /*                        */
 42:Pin     18      =       !OEO    ;       /*                        */
 43:Pin     19      =       RESET_  ;       /*                        */
 44:
 45:/**     Equations  **/
 46:
 47:DSACK0_         =       DSACK1_;
 48:
 49:DSACK0_.oe      =       !ROMEN_ & !AS_ & RESET_;
 50:
 51:AVEC_           =       'b' 0;
 52:
 53:AVEC_.oe        =       FC0 & FC1 & A17 & A16 & !AS_ & RESET_;

LISTING FOR LOGIC DESCRIPTION FILE: xu9r4s4.pld                      Page 2

CUPL: Universal Compiler for Programmable Logic
Version 3.2a Serial# MD-32A-6848
Copyright (C)  1983,1989 Logical Devices, Inc.
Created Tue Sep 08 14:02:46 1992

 54:
 55:OEO             =       !ROMEN_ & !AS_ & RESET_ & !OPTION;
 56:
 57:Q0.d            =       !ROMEN_ & !AS_ & !OPTION & !(FC0 & FC1 & A16 & A17) & RESET_;
 58:
 59:Q1.d            =       Q0 & !AS_ & RESET_;
 60:
 61:
 62:



Jedec Fuse Checksum       (365E)
Jedec Transmit Checksum   (C428)